Back in 2009 I spotted nice bit of kit with hi-end ALTERA FPGA for a good price, and snagged all of them for digital projects and learning.
Board pretty simple and features absolute minimum to power on and run Stratix EP1S25F672C6. There are no any external memory or peripherals.
Instead lots of I/O just exposed via 2.54 mm pitch square pin header. Bottom side of PCB also have female ports for headers, forming mezzanine connection if needed.

There is on-board Ubicom SX20AC MCU to load bitstream into FPGA from RS232 as well as direct JTAG header compatible with ALTERA USB-Blaster.
Clock generator installed with pin sockets, so clock is interchangeable by user.

Full feature list from official documentation:

• The Stratix or Cyclone device is mounted on the SmartPack with 128 I/Os conveniently available from both top and bottom via .100” headers
• The SmartPack regulates both 3.3V for I/O and 1.5V for the FPGA core from the power jack
• The four-pin Clock socket accepts a 3.3V oscillator whose output is routed to a clock input on the Stratix or Cyclone device
• Power filtering for all PLLs is provided, as well as dedicated clock inputs piggybacked on I/O pins
• A reset button provides easy restart of your application
• The integrated PX Loader provides configuration/boot functions over your PC’s serial port using the PX.EXE software
• 115.2k/230.4k baud operation with run-length data compression for speedy downloads
• .RBF files can be sent, as well as memory-content files which use the PXL_.TDF module
• An 8Mbit flash device stores complete device and memory contents for power-up boot
• The DB9 serial port is under Stratix/Cyclone control when the PX Loader is not busy
• A JTAG connector is provided as an alternate means to configure the Stratix or Cyclone device (not provided on FastPack)

8 green LEDs available for user usage. Demo design have a 8-bit counter running these LEDs.

Stratix can take quite a lot of power if fully utilized, so board was shipped with good 4.0-5.5V power supply with output current capability 2.6-2.3 A.

Per Parallax documentation for SmartPack boards there are different versions of these modules exist, like:

• Stratix 672 SmartPack – EP1S25 (#60001)
• Stratix 672 SmartPack – EP1S10 (#60002)
• Cyclone 324 SmartPack – EP1C20 (#60003)
• Cyclone 100 FastPack – EP1C3 (#60004)

Schematics for SmartPack 672 is up for grabs, in PDF format.
And just for reference ALTERA’s Handbook for Stratix covers details for this FPGA family

Here is simple Quartus project available for testing functionality of FPGA module.