xDevs.com QVR - Ultra-low noise DC Voltage reference

This is work in progress project, updates will be posted frequently.


I’ve been always interested to see how practical it is to combine multiple best on the market zener references into averaged lower noise zener array bank. Practical example of such setup would be old Datron 4910 which has implemented averaged output from four LTZ1000-based cells. Four zener cores is a good balance between performance and cost, as theoretical reduction of the output noise follows square root of N law, where N is number of cells in the array. As for practical use case for such lower noise zener reference module – we can try it in HP 3458A DMM instead of original LTZ1000A A9 module and test if lowering noise for 7V reference helps with overall DMM noise performance. This is how Quad Voltage Reference “QVR” project came to life back in 2019.

To have good separation between cells and ease of routing PCB Layout was done with six copper layers and Rogers RO4350 dielectric.

Cross-section of the PCB, overall thickness 1.6 mm.

Module assembled with some additional shielding and air baffles to reduce low frequency noise from thermal variations around each of the LTZ1000A chips.

Module installed in Keysight 3458A DMM, replacing onboard A9 LTZ1000A-module

First module:

Second module:


Preliminary 0.1 – 10 Hz noise test results, room temperature.

Long-term stability.

QVR Unit #1 was mostly kept unpowered to evaluate deviation and instability of the quad LTZ1000A-based reference module. Measurements were handled at two different locations with international shipping of the unit with regular postal service (USPS at US end, EMS at NMI location).

Calibration reference value T23°C = 9.990901 VDC ±0.8 ppm , 10.SEP.2019

1st temperature sweep prior to shipping for NMI
2nd temperature sweep prior to shipping for NMI

Calibration result from NMI (Calibrated 3458A readout)

Calibration transfers on DC Zener bank array at NMI

Calibration reference value T23°C = 9.990904 VDC ±0.6 ppm , 17.JAN.2021

Then standard was returned and tested again, powered from Fluke 792X battery power pack.

Calibration reference value T17°C = 9.9909107 VDC ±0.6 ppm , 1.APR.2021
Calibration reference value T23°C = 9.9909107 VDC ±0.6 ppm , 1.APR.2021
Calibration reference value T30°C = 9.9909107 VDC ±0.6 ppm , 1.APR.2021
Calibration reference value T45°C = 9.9909107 VDC ±0.6 ppm , 1.APR.2021

Datalog with triple 3458A, in thermal chamber

Second prototype batch with ADR1000AHZ superzeners

SN0003 – Quad LTZ1000A low noise version

This QVR module is built with four LTZ1000ACH cells aged for 4 years with main goal on providing low noise output. It is trimmed for output just +2.1 µV/V above nominal 10 V and has two DC voltage outputs provided to user by LEMO 1B.EVP connector. 10 V output is routed from active discrete PNP/NPN stage from gain OPA2189 amplifier. Output resistance is less than 2 Ω. Second averaged +7.1 V output is provided on same connector. It is unbuffered and taken directly from the passive resistor averaging network. Output resistance for +7.1 V output is about 2 kΩ and it cannot drive any load. Small 10 nA current loading may cause error close to 0.1 µV/V for this output.

Kit is supplied with 8-conductor cable terminated with 2B.308 connector. This connector provide power to the reference. For proper operation it is best to supply at least +11 and -11 V DC to the module. Pinout for the connector listed in table below:

LEMO 2B.308 connector pin Purpose Rated input Nominal supply current
Pin 1 Positive voltage supply +10.8 to +13.6 V 0.26 A after warm-up, 0.4 A cold
Pin 5 Negative voltage supply -10.8 to -13.6 V 0.005 A after warm-up, 0.01 A cold
Pin 6 Ground/return pin Reference zero

Reference has no adjustable elements or user controls and operational after 6 hour warm-up time.

Bottom side of aluminum extruded enclosure has heatsink fins for additional dissipation of the heat from the reference. Time delay for inner temperature is about 2 hours.

All key performance parameters and current calibration data is added on the enclosure label for the ease of use.

For shipping connectors are protected with plastic caps.

LEMO 1S.EVP connector is identical to one used in Keithley 2182/2182A and HP/Agilent/Keysight 34420A nanovoltmeters. If standard nanovoltmeter cable connected to this QVR module signals mapping for wires is as listed in table below.

nV cable wire Purpose
Red wire Positive output for +10 V
Black wire Negative return for +10 V
Green wire Positive output for averaged passive +7.1 V
White wire Negative return for averaged passive +7.1 V

Do not source or sink current into averaged passive +7.1 V to avoid risk of damaging input amplifier or resistor network.

Calibration results for 17 April, 2024, battery powered from Fluke 792A.

RAW data set

Calculated polyfit for 7V output = -3.73278597E-09×2 – 3.81348455E-07x + 7.14885389E+00
Calculated polyfit for 10V output = 1.61494518E-09×2 + 3.57968196E-07x + 1.00000095E+01

With standard analysis for tempco with reference +23.0 °C we now can obtain

+7 V TCR α -0.077 µV/V/K, β -0.001 µV/V/K2, Tzero = -51.1 °C
+10 V TCR α +0.043 µV/V/K, β 0.0002 µV/V/K2, Tzero = -110.8 °C

Absolute output calibration from zener array bank determined EMF at 10.00002096 V ±0.6 µV/V and 7.1488428 V ±0.9 µV/V with +23.0 °C temperature. Warm-up time from cold state is 6 hours.

This reference require high-isolation bipolar power supply or battery power. Error due to ground currents on standard linear power supply (Keysight E36312A) was measured around +0.8 µV/V.

Noise measurement for 7 V output in 0.1 Hz – 10 Hz bandwidth, result about 450 nV peak to peak. This is just ±0.032 µV/V relative to 7.15 V output.

Noise measurement for 10 V output in 0.1 Hz – 10 Hz bandwidth, result about 560 nV peak to peak. This is just ±0.028 µV/V relative to 10 V output. For comparison modern Fluke 732C DC reference generate twice larger noise in this bandwidth for its 10V output.

SN0004 – Dual ADR-chip module with 10V output

Parameter Property Note
Zener C: ADR1000AHZ, A: ADR1000AHZ unaged new chips, 6mm mount gap to PCB, 13mm total top Z height
Temp setpoint C: 11500:1000 Ω VHD200, A: 13000:1000 Ω VHD200 C:new chip, A: network S/N 8
IZ setpoint Both 80 Ω VHP202ZT new chips, random run, not selected
BiasR 4 × 62 kΩ MELF0204 5 ppm/K
Opamp OPA2140 for zener cells, ADA4522-2 for output stage
Output scale RDIV VHD200 10000:5105 Ω R11:R9 position
TC trim oven C: TBD, A: TBD
Capacitors C: 100nF C0G, A: 100nF Film
Power Onboard LT3045 +12VDC output voltage point
Output cap None
Z6 network TBD

Noise performance of SN0004 unit

Here are noise measurement results with battery-operated QVR module and battery operated 80 dB 0.1-10Hz AC coupled LNA.

C Cell : RAW output noise (+6.62 VDC from Zener core) measurement in 0.1 – 10 Hz bandwidth :

Average value is 377 nV peak to peak, which is good for a single ADR zener. Measurement standard deviation is 34 nVptp.

A Cell : RAW output noise (+6.62 VDC from Zener core) measurement in 0.1 – 10 Hz bandwidth :
This cell operates at higher oven temperature around +75 °C.

Average value is 395 nV peak to peak, which is good for a single ADR zener. Measurement standard deviation is 41 nVptp.

Now A+C combined cells with 250||250 foil resistors. This is combined RAW output noise (+6.62 VDC from two zener cores) measurement in 0.1 – 10 Hz bandwidth.

Average value is 281 nV peak to peak, which is promising result with just two ADR zeners. Measurement standard deviation is 24 nVptp. This is pretty close to quad LTZ1000A-based QVR results, which was ~248 nV peak to peak with same measurement setup.

Noise floor of this noise measurement setup is around 100 nV peak to peak.

This quad ADR1000 module was retrimmed for temperature coefficient below 0.05 µV/V/K.

And boxed unit:

Low thermal TBP3 posts were used for best 5-way connection interface to the QVR reference module.

SN0005 – Quad Zener-chip comparison module with direct outputs

Purpose of this build is to run different chips in the same PCBA in same conditions and compare their long-term stability. No magical special aging was performed on any of the chips. They sat on the shelf unused for some time and now just soldered on the board fresh.

Parameter Cell A Cell B Cell C Cell D
Zener type LTZ1000CH LTZ1000ACH ADR1000AHZ ADR1000AHZ
Date code 28 week 2021 34 week 2022 33 week 2023 39 week 2018
Temp setpoint 13 kΩ / 1 kΩ VHD200 16.0674 kΩ / 1.3015 kΩ 13 kΩ / 1 kΩ VHD200
Iz set resistor 120 Ω VHP203T 80 Ω VHP202T 100 Ω VHP202T
Temp point voltage 0.506 V 0.511 V 0.495 V 0.472 V
Iz voltage, measured 0.4240 V 0.429 V 0.4846 V 0.4734 V
Iz current, calculated 3.53 mA 3.57 mA 6.06 mA 4.73 mA
Opamp TI OPA2140
Q1 resistor Susumu 68 kΩ MELF 62 kΩ
Q2 resistor Susumu 68 kΩ MELF 62 kΩ
FB capacitors 0.15 uF 1206 film
TC trim 150 kΩ 820 kΩ 332 kΩ 820 kΩ
Noise, 0.1 Hz – 10 Hz 895 nV pk-pk 957 nV pk-pk 367 nV pk-pk 410 nV pk-pk
Initial voltage, FEB.13.2024 7.17232133 V 7.09003609 V 6.60987871 V 6.62218042 V

Board as assembled. Standard Sn60Pb40 solder paste was used to mount all the passive and active components.

All SMT parts were soldered in convection 6-zone oven using maximum temperature +215 °C.

Zener chips and resistors soldered by hand using Sn60Pb40 solder.

Onboard power supply configured to provide +12.0 V, using LT3045-1EDD regulator with 4.7 µF 0805 feedback capacitor. Output stage is configured with OPA2189 and discrete output NPN+PNP stage but currently unused. Averaging of zener outputs is also unused (Z6 network is not populated).

All chips are populated at about 2-3 mm gap from the PCB surface.

QVR PCB has few layout issues, so this board mitigated that with a rework. Zener opamps ground is incorrectly routed to signal return plane instead of power supply “noisy” ground. This also affect decoupling capacitor. So running separate ground required tomb-stoning capacitors and isolating pin 4 on the each OPA2140 opamp from PCB by small kapton tape pad. Then all floated connections routed to power ground at the capacitor C4 per star wiring.

Cell C used epoxy BMF resistor network based on S102 elements for temperature setpoint. Rest of resistors are hermetic metal foils.

Both sections of the PCB zones with zener chips isolated from airflow by 3D-printed plastic cap from both top and bottom side.

Caps are covered together with 0.25 mm thick copper adhesive tape. Each piece of tape was connected electrically together and tied to ground potential at the PCB in one point.

Back of the PCB area under OPA2140 opamps and foil resistors was also taped with solid copper tape placed on top of 2 layers of kapton tape for insulation.

Individual zener voltages are available on J2 and J7 pin header ports in the bottom right side of PCBA.

Noise measurements with 80 dB amplifier with Cell C and Cell D:

Noise measurements with 80 dB amplifier with Cell A and Cell B. Please note larger 200 nV/division vertical scale on the plots.

Visual comparison to the very old SN0002 quad-LTZ1000ACH module, used to test noise limits of 3458A:

And here we will keep track on long-term drift data points. Board was first powered up February 13, 2024 at 1:46 am.

Parameter Cell A Cell B Cell C Cell D Test duration
Zener type, datecode LTZ1000CH, 2128 LTZ1000ACH, 2234 ADR1000AHZ, 2333 ADR1000AHZ, 1839
Module power applied, TC trim initial 820 kΩ 820 kΩ 820 kΩ 820 kΩ
Output voltage, FEB.13.2024 7.17232149 V 7.09003469 V 6.609880 V 6.62218042 V -> 6.622153 V 55612 seconds
Module power applied, TC trim 1 240 kΩ 820 kΩ 680 kΩ 820 kΩ
Output voltage, FEB.14.2024 7.17232247 V 7.08996560 V 6.609873 V -> 6.609882 V 6.622153 V -> 6.622119 V 143487 seconds
Module power applied, TC trim 2 150 kΩ 820 kΩ 332 kΩ 820 kΩ
Output voltage, FEB.15.2024 7.17231999 V 7.08990526 V 6.60982031 V 6.62211983 V 187163 seconds
Module power applied, TC trim 3 150 kΩ 820 kΩ 500 kΩ 820 kΩ
Output voltage, FEB.17.2024 7.17232449 V 7.08991079 V 6.60989303 V 6.62208501 V 111618 seconds

Temperature coefficient results after trim 2 show great results, except Cell C. Went too aggressive with 332 kΩ resistor there, need more in range 450-500 kΩ instead.

And final retrim:

Cell C is still little bit higher tempco, but it was determined to leave it as is. Total time that reference module spent powered up during thermal cycles and initial check runs is 505524 seconds ±600 seconds, or 140.4 hours.

March 2024 data : 700 hours

After running reference powered up for total 700 hours (first 140.5 hours are omitted from plot, “zero” reference taken on 19 February, 2024) drift difference between different chips is quite noticeable.

Both LTZ1000CH and LTZ1000ACH demonstrate clear absence of any significant drift, which underline excellent performance of LTZ design once again. All we can see on LTZ outputs is just residual temperature coefficient play and random noise walk up and down. Worst outlier points for these chips staying within ±0.4 µV/V from initial point on 19 February, 2024.

ADR1000 chips however are not so stable and have significant drift. Newer 33 week 2023 chip which is running at +65 °C oven setpoint demonstrated upward +2.0 µV/V drift in first 8 days from zero point and then somewhat stabilized with walk around ±0.3 µV/V. Older 2018 week 39 chip running at hotter +75 °C (as datasheet recommends to us) and demonstrate opposite drift of -4.2 µV/V and still going. There is no visible stabilization time for this chip, just like with other 1839 chips from older module we explored in long-term drift study page.

Based on this time frame conclusion is:

1. LTZ1000-based solutions already able to stabilize in time period less than 140 hours after assembly.
2. New year 2023 week 33 ADR1000 chip shows promising stabilization time, more into future will determine if this statement holds.
3. Old year 2018 week 39 ADR1000 chip does not stabilize in 700 hours timeframe after assembly.

Complete data log for QVRL SN0005 module

Parameter Cell A Cell B Cell C Cell D Test duration
Zener type, datecode LTZ1000CH, 2128 LTZ1000ACH, 2234 ADR1000AHZ, 2333 ADR1000AHZ, 1839
Module power applied, TC trim 3 150 kΩ 820 kΩ 500 kΩ 820 kΩ
Output voltage, FEB.17.2024 7.17232449 V 7.08991079 V 6.60989303 V 6.62208501 V 111618 seconds
Output voltage, FEB.19.2024 by XBank 7.17230188 V 7.08989138 V 6.60987132 V 6.62205624 V
Output voltage, MAR.14.2024 by XBank 7.17230242 V 7.08989216 V 6.60988050 V 6.62203468 V


Real-time discussion about this article and related stuff is very welcome at our own xDevs.com IRC-chat server: xdevs.com (standard port 6010, channel: #xDevs.com).

Author: Ilya Tsemenko
Created: Sept. 20, 2019, 2:12 p.m.
Modified: April 18, 2024, 10:41 p.m.